1- a 64-bit word computer employs a 128kb cache. the address bus in this system is 32-bits. determine the number of bits in each field of the memory address register (mar) as seen by cache in the following organizations (show your calculations): a. fully associative mapping with line size of 4 words. b. direct mapping with the line size of 8 words. c. 2-way set associated mapping with the line size of 4 words. d. 8-way set associated mapping with the line size of 2 words.