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Engineering, 18.09.2019 04:30 jos0305

Write the vhdl code for your system. create a single module entity with inputs of i, r, la, lb, lc and three outputs which are the outputs of the three registers. use a single level hierarchy. your code should have three processes, one for each register with its associated mux and logic. (see "vhdl for multifunction register with functional control signals" in the lecture notes)

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