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Assuming the following dynamic instruction 10 - - frequency for a program running on the single- cycle MIPS processor discussed in class, addu lw addiu beq sw j 30% 20% 15% 15% 15% 5% Address 0xDECADE 0xDECAD8 0xDECA08 0xBECADE 0xDECADE Event (a) (5 pts.) In what fraction of cycles is data memory written

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