For a direct-mapped cache design with a 64-bit address, the following bits of the address are used to access the cache Tag Index Offset
63–10 9–5 4–0

Required:
a. What is the cache block size (in words)?
b. How many blocks does the cache have?
c. What is the ratio between total bits required for such a cache implementation over the data storage bits? Beginning from power on, the following byte-addressed cache references are recorded.

The technology acceptance model (tam) is a two-factor model that describes user acceptance of new or replacement technology solutions (davis, 1989). this evaluation model has withstood the test of time and is widely used. the model is based upon perceptions and beliefs of individuals and measures two types of factors: (a) perceived ease of use and (b) perceived usefulness. prepare an analysis (briefing paper) (5 to 7 strong paragraphs) in which you explain how cybersecurity researchers could use the tam model to explore the factors which affect employee acceptance of biometrics used for access to facilities and/or computing systems. what research questions might they ask? what measurements would be needed? post your briefing paper as a reply to this topic. remember to cite your sources (3 minimum) and include a reference list at the end of your posting.