(a) For the following MIPS assembly code to be executed using the pipelined datapath, identify all of the data dependencies (which register in which instruction needs to read the result register value from which another instruction that is writing it?) and enumerate them (give data dependencies numbers as 1,2, ...).
(b) Which dependencies are data hazards that will be resolved via forwarding and without a stall (you can specify the number(s) from the part a)?
(c) Which dependencies are data hazards that will cause a stall (you can specify the number(s) from the part a)?

add $t4, $t8, $t3
lw $t2, 8($t4)
add $t6, $t1, $t2
sub $t9, $t6, $t3
lw $t5, 12($t9)
add $t8, $t5, $t3
sub $t3, $t4, $t5

Check the explanation

Explanation:

MIPS assembly language basically means the MIPS processor’s assembly language. The acronym MIPS stands for Microprocessor without Interlocked Pipeline Stages, that is also a reduced-instruction set architecture which was built by a company called MIPS Technologies.

MIPS is a store /load architecture more like a register-register architecture; except for the load/store instructions that is being used to access memory, all instructions operate on the registers.

Kindly check the attached image below to see the step by step explanation to the question.

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