Design a 16-way set associative cache that has 512 blocks and 64 bytes per block. Assume a 32-bit address. Provide structure of the cache and the address format, similar as on Slide H47, but gates, multiplexers and comparators do not have to be included. Assume 4byte data.

Check the explanation

Explanation:

Here we have 64 bytes per block so, n = 6

no of blocks = 512 nad 16-way set associate cache so

no of set = 29/24 i.e 5

So if get any address and to get individual fields we need to as follows:

Block Offset = Memory Address mod 2n

Block Address = Memory Address / 2n

Set Index = Block Address mod 2s