Agiven fpga board uses a 2 gigahertz clock. design, and implement in simulink, a circuit for this board (using a hdl counter with appropriate number of cycles) that generates 2 hertz pwm signal with a 10-90 duty cycle. you can use counters and comparators in simulink. explain your design and provide scope captures of your output signal. (for simulation purposes, you can scale down the number of cycles and indicate in the homework what the actual values are and how you scaled them down.)