#supporting # this code copies data values into a destination array. # the data values are copied from either the 'left' # array or the 'right' array. # for each element position, a 'selector' array tells us which # value to copy into the destination array. # # assume $a0 is selector addr # assume $a1 is left addr # assume $a2 is right addr # assume $a3 is dest addr # # $t0 is an index for keeping an array index # there are 1,000 elements in each the processor is a 5 stage pipeline (if, reg, ex, mem, wb). the processor does not do forwarding i. e forward from a register that is in between each stage. it only addresses control and data hazards through stalls. however, the processor is allowed to write in the first half the cycle (wb) and read in the second half from the register (reg) file/decode cycle. those are pretty much the parameters to this problem.(a) given these assumptions, how many instructions execute, what is the average cpi for this program, and how long does it take to run? show your work in sufficient detail so that we can see how/where you found stalls, the strategy you used to count cycles, etc.